[. . . ] [. . . ] The SPDs are programmed to JEDEC standard latency 1066Mhz timing of 7-7-7 at 1. 5V. The electrical and mechanical specifications are as follows: FEATURES: JEDEC standard 1. 5V ± 0. 075V Power Supply VDDQ = 1. 5V ± 0. 075V 533MHz fCK for 1066Mb/sec/pin 8 independent internal bank Programmable CAS Latency: 6, 7, 8, 9 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock Programmable CAS Write Latency(CWL) = 6(DDR3-1066) 8-bit pre-fetch Burst Length: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] Bi-directional Differential Data Strobe Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%) On Die Termination using ODT pin On-DIMM thermal sensor (Grade B) Average Refresh Period 7. 8us at lower then TCASE 85°C, 3. 9us at 85°C < TCASE . 95°C Asynchronous Reset PCB : Height 1. 180" (30. 00mm), double sided component PERFORMANCE: CL(IDD) Row Cycle Time (tRCmin) Refresh to Active/Refresh Command Time (tRFCmin) Row Active Time (tRASmin) Power UL Rating Operating Temperature Storage Temperature 7 cycles 50. 63ns (min. ) 160ns (min. ) 37. 5ns (min. ) 3. 705 W (operating per module) 94 V - 0 0o C to 85o C -55o C to +100o C Document No. VALUERAM0939-001. A00 12/06/10 Page 1 ValueRAM MODULE DIMENSIONS: (Units = millimeters) Document No. [. . . ] [. . . ]